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utron ut62w1024 rev. 1.0 128k x 8 bit wide range low power cmos sram utron technology inc. p80056 1f, no. 11, r&d rd. ii, science-based industr ial park, hsinchu, taiwan, r. o. c. tel: 886-3-5777882 fax: 886-3-5777919 1 ? features ? access time : 35/55/70ns (max.) ? low power consumption : operating : 60/50/40 ma (typical) standby : 10 a (typical) l-version 1 a (typical) ll-version ? wide range power supply : 2.7v to 5.5v ? all inputs and outputs ttl compatible ? fully static operation ? three state outputs ? data retention voltage : 2v (min.) ? package : 32-pin 600 mil pdip 32-pin 450 mil sop 32-pin 8x20mm tsop-1 32-pin 8x13.4mm stsop functional block diagram column i/o column decoder row decoder i/o control logic control a15 i/o1 v ss v cc we oe 1 ce i/o8 . . . . . . . . . a13 a 7 a6 a5 a4 a8 a 11 a 2 a1 a 0 a 10 . . . . . . memory array 1024 rows 1024 columns a 9 a14 a12 a16 a 3 ce2 pin description symbol description a0 - a16 address inputs i/o1 - i/o8 data inputs/outputs 1 ce ,ce2 chip enable 1,2 inputs we write enable input oe output enable input v cc power supply v ss ground nc no connection general description the ut62w1024 is a 1,048,576-bit low power cmos static random access memory organized as 131,072 words by 8 bits. it is fabricated using high performance, high reliability cmos technology. the ut62w1024 is designed for low power application. it is particularly well suited for battery back-up nonvolatile memory application. the ut62w1024 operates from a wide range of 2.7v~ 5.5v power supply and all inputs and outputs are fully ttl compatible. pin configuration a12 a7 a6 a5 a4 a3 a2 a1 a0 i/o1 i/o2 ce2 a8 a9 a11 a10 i/o8 i/o7 i/o6 i/o5 i/o4 i/o3 vss ut62w1024 pdip / sop 28 14 13 12 11 10 9 8 7 6 5 4 3 2 1 17 16 15 20 19 18 22 23 24 25 26 27 21 1 ce we oe a13 a14 nc a16 vcc a15 29 30 31 32 tsop-i/stsop i/o4 a11 a9 a8 a13 i/o3 a10 a14 a12 a7 a6 a5 vcc i/o8 i/o7 i/o6 i/o5 vss i/o2 i/o1 a0 a1 a2 a4 a3 ut62w1024 28 14 13 12 11 10 9 8 7 6 5 4 3 2 1 17 16 15 20 19 18 22 23 24 25 26 27 21 we oe 1 ce ce2 nc a15 a16 32 31 30 29
utron ut62w1024 rev. 1.0 128k x 8 bit wide range low power cmos sram utron technology inc. p80056 1f, no. 11, r&d rd. ii, science-based industr ial park, hsinchu, taiwan, r. o. c. tel: 886-3-5777882 fax: 886-3-5777919 2 ? absolute maximum ratings * parameter symbol rating unit terminal voltage with respect to vss v term -0.5 to +4.6 v operating temperature t a 0 to +70 storage temperature t stg -65 to +150 power dissipation p d 1 w dc output current i out 50 ma soldering temperature (under 10 sec) t solder 260 *stresses greater than those listed under ?absolute maximum ra tings? may cause permanent damage to the device. this is a stress rating only and functional operation of the device or any other conditions abov e those indicated in the operational sections of this specification is not implied. exposure to the absolute maximum rating conditions for extended period may affec t device reliability. truth table mode 1 ce ce2 oe we i/o operation supply current standby h x x x high - z i sb , i sb1 standby x l x x high -z i sb , i sb1 output disable l h h h high - z i cc read l h l h d out i cc write l h x l d in i cc note: h = v ih , l=v il , x = don't care. dc electrical characteristics ( ) (v cc = 2.7v~3.6v, vss=0v, ta = 0 to 70 ) parameter symbol test condition min. typ. max. unit input high voltage v ih 2.0 - v cc +0.5 v input low voltage v il - 0.5 - 0.6 v input leakage current i il v ss Q v in Q v cc - 1 - 1 a output leakage current i ol v ss Q v i/o Q v cc 1 ce =v ih or ce2 = v il or oe = v ih or we = v il - 1 - 1 a output high voltage v oh i oh = - 1ma 2.2 - - v output low voltage v ol i ol = 4ma - - 0.4 v -35 - 40 60 ma -55 - 35 50 ma i cc cycle time =min. 100% duty, 1 ce =v il , ce2 = v ih , i i/o = 0ma -70 - 30 40 ma average operating power supply courrent i cc1 cycle time = 1 s, 100% duty, . 1 ce Q 0.2v,ce2 R v cc -0.2v, , c l =50pf - - 5 ma i sb 1 ce =v ih or ce2 = v il - - 1.0 ma 100 - l - 2.5 20* a 40 standby power supply current i sb1 1 ce R v cc -0.2v or . ce2 Q 0.2v - ll - 0.5 10* a *those parameters are for reference only under 50
utron ut62w1024 rev. 1.0 128k x 8 bit wide range low power cmos sram utron technology inc. p80056 1f, no. 11, r&d rd. ii, science-based industr ial park, hsinchu, taiwan, r. o. c. tel: 886-3-5777882 fax: 886-3-5777919 3 ? dc electrical characteristics ( ) (v cc = 4.5v~5.5v, vss=0v, ta = 0 to 70 ) parameter symbol test condition min. typ. max. unit input high voltage v ih 2.2 - v cc +0.5 v input low voltage v il - 0.5 - 0.8 v input leakage current i il v ss Q v in Q v cc - 1 - 1 a output leakage current i ol v ss Q v i/o Q v cc 1 ce =v ih or ce2 = v il or oe = v ih or we = v il - 1 - 1 a output high voltage v oh i oh = - 1ma 2.4 - - v output low voltage v ol i ol = 4ma - - 0.4 v -35 - 60 100 ma -55 - 50 85 ma i cc cycle time =min. 100% duty, 1 ce =v il , ce2 = v ih , , c l =100pf -70 - -40 70 ma average operating power supply courrent i cc1 cycle time = 1 s, 100% duty, . 1 ce Q 0.2v,ce2 R v cc -0.2v, i i/o = 0ma - - 5 ma i sb 1 ce =v ih or ce2 = v il - - 1.0 ma 100 - l - 2.5 20* a 40 standby power supply current i sb1 1 ce R v cc -0.2v or . ce2 Q 0.2v - ll - 0.5 10* a *those parameters are for reference only under 50
utron ut62w1024 rev. 1.0 128k x 8 bit wide range low power cmos sram utron technology inc. p80056 1f, no. 11, r&d rd. ii, science-based industr ial park, hsinchu, taiwan, r. o. c. tel: 886-3-5777882 fax: 886-3-5777919 4 ? capacitance (t a =25 , f=1.0mhz) parameter symbol min. max. unit input capacitance c in - 8 pf input/output capacitance c i/o - 10 pf note : these parameters are guaranteed by device characterization, but not production tested. ac test conditions input pulse levels 0v to 3.0v input rise and fall times 5ns input and output timing reference levels 1.5v output load c l =100pf, i oh /i ol =-1ma/4ma(v cc =5v) c l =50pf, i oh /i ol =-1ma/2ma(v cc =3.3v) ac electrical characteristics (vcc = 2.7v~5.5v, v ss =0v , ta = 0 to 70 ) (1) read cycle parameter symbol ut62w1024-35 ut62w1024-55 ut62w1024-70 unit min. max. min. max. min. max. read cycle time t rc 35 - 55 - 70 - ns address access time t aa - 35 - 55 - 70 ns chip enable access time t ace1 , t ace2 - 35 - 55 - 70 ns output enable access time t oe - 25 - 30 - 35 ns chip enable to output in low-z t clz1 *, t clz2 * 10 - 10 - 10 - ns output enable to output in low-z t olz * 5 - 5 - 5 - ns chip disable to output in high-z t chz1 *, t chz2 * - 25 - 30 - 35 ns output disable to output in high-z t ohz * - 25 - 30 - 35 ns output hold from address change t oh 5 - 5 - 5 - ns (2) write cycle parameter symbol ut62w1024-35 ut62w1024-55 ut62w1024-70 unit min. max. min. max. min. max. write cycle time t wc 35 - 55 - 70 - ns address valid to end of write t aw 30 - 50 - 60 - ns chip enable to end of write t cw1 , t cw2 30 - 50 - 60 - ns address set-up time t as 0 - 0 - 0 - ns write pulse width t wp 25 - 40 - 45 - ns write recovery time t wr 0 - 0 - 0 - ns data to write time overlap t dw 20 - 25 - 30 - ns data hold from end of write-time t dh 0 - 0 - 0 - ns output active from end of write t ow * 5 - 5 - 5 - ns write to output in high-z t whz * - 15 - 20 - 25 ns *these parameters are guaranteed by device char acterization, but not production tested.
utron ut62w1024 rev. 1.0 128k x 8 bit wide range low power cmos sram utron technology inc. p80056 1f, no. 11, r&d rd. ii, science-based industr ial park, hsinchu, taiwan, r. o. c. tel: 886-3-5777882 fax: 886-3-5777919 5 ? timing waveforms read cycle 1 (address controlled) (1,2,4) t rc address dout data valid t aa t oh t oh read cycle 2 ( 1 ce , ce2 and oe controlled) (1,3,5,6) t rc t aa t ace1 t ace2 t oe t chz1 t chz2 t ohz t clz1 t clz2 t oh t olz high-z data valid high-z address ce1 ce2 oe dout notes : 1. we is high for a read cycle. 2. device is continuously selected oe , 1 ce =v il and ce2=v ih. 3. address must be valid prior to or coincident with 1 ce low and ce2 high transition; otherwise t aa is the limiting parameter. 4. oe is low. 5. t clz1 , t clz2 , t olz , t chz1 , t chz2 and t ohz are specified with c l =5pf. transition is measured 500mv from steady state. 6. at any given temperature and voltage condition, t chz1 is less than t clz1 , t chz2 is less than t clz2 , t ohz is less than t olz.
utron ut62w1024 rev. 1.0 128k x 8 bit wide range low power cmos sram utron technology inc. p80056 1f, no. 11, r&d rd. ii, science-based industr ial park, hsinchu, taiwan, r. o. c. tel: 886-3-5777882 fax: 886-3-5777919 6 ? write cycle 1 ( we controlled) (1,2,3,5) t wc t aw t cw1 t as t wp t whz t ow t dw t dh t cw2 t wr address ce1 ce2 we dout din data valid high-z (4) (4) write cycle 2 ( 1 ce and ce2 controlled) (1,2,5) t wc t aw t cw1 t as t wr t cw2 t wp t whz t dw t dh data valid address ce1 ce2 we dout din high-z notes : 1. we or 1 ce must be high or ce2 must be low during all address transitions. 2. a write occurs during the overlap of a low 1 ce , a high ce2 and a low we . 3. during a we controlled with write cycle with oe low, t wp must be greater than t whz +t dw to allow the i/o drivers to turn off and data to be placed on the bus. 4. during this period, i/o pins are in the output state, and input singals must not be applied. 4. if the 1 ce low transition occurs simultaneously with or after we low transition, the outputs remain in a high impedance state. 6. t ow and t whz are specified with c l =5pf. transition is measured 500mv from steady state.
utron ut62w1024 rev. 1.0 128k x 8 bit wide range low power cmos sram utron technology inc. p80056 1f, no. 11, r&d rd. ii, science-based industr ial park, hsinchu, taiwan, r. o. c. tel: 886-3-5777882 fax: 886-3-5777919 7 ? data retention characteristics (t a = 0 to 70 ) parameter symbol test condition min. typ. max. unit vcc for data retention v dr 1 ce R v cc -0.2v or ce2 0.2v 2.0 - - v 80 data retention current i dr vcc=3v - l - 2 20* a 20 1 ce R v cc -0.2v or ce2 0.2v - ll - 0.5 10* a chip disable to data t cdr see data retention 0 - - ns retention time waveforms (below) recovery time t r t rc * - - ns t rc * = read cycle time *those parameters are for reference only under 50 data retention waveform t cdr t r 4.5v v cc 1 ce v ss date retention mode v dr R 2.0v 1 ce R v cc -0.2v 4.5v v il v iil v ih v ih ce2 0.2v ce2
utron ut62w1024 rev. 1.0 128k x 8 bit wide range low power cmos sram utron technology inc. p80056 1f, no. 11, r&d rd. ii, science-based industr ial park, hsinchu, taiwan, r. o. c. tel: 886-3-5777882 fax: 886-3-5777919 8 ? package outline dimension 32 pin 600 mil pdip package outline dimension unit symbol inch(base) mm(ref) a1 0.010 (min) 0.254 (min) a2 0.150 0.005 3.810 0.127 b 0.018 0.005 0.457 0.127 b1 0.050 0.005 1.270 0.127 c 0.010 0.004 0.254 0.102 d 1.650 0.005 41.910 0.127 e 0.600 0.010 15.240 0.254 e1 0.544 0.004 13.818 0.102 e 0.100 (typ) 2.540 (typ) eb 0.640 0.020 16.256 0.508 l 0.130 0.010 3.302 0.254 s 0.075 0.010 1.905 0.254 q1 0.070 0.005 1.778 0.127 note: 1. d/e1/s dimension do not include mold flash. a a
utron ut62w1024 rev. 1.0 128k x 8 bit wide range low power cmos sram utron technology inc. p80056 1f, no. 11, r&d rd. ii, science-based industr ial park, hsinchu, taiwan, r. o. c. tel: 886-3-5777882 fax: 886-3-5777919 9 ? 32 pin 450mil sop package outline dimension unit symbol inch(base) mm(ref) a 0.118 (max) 2.997 (max) a1 0.004(min) 0.102(min) a2 0.111(max) 2.82(max) b 0.016(typ) 0.406(typ) c 0.008(typ) 0.203(typ) d 0.817(max) 20.75(max) e 0.445 0.005 11.303 0.127 e1 0.555 0.012 14.097 0.305 e 0.050(typ) 1.270(typ) l 0.0347 0.008 0.881 0.203 l1 0.055 0.008 1.397 0.203 s 0.026(max) 0.066 (max) y 0.004(max) 0.101(max) 0 o -10 o 0 o -10 o a c a
utron ut62w1024 rev. 1.0 128k x 8 bit wide range low power cmos sram utron technology inc. p80056 1f, no. 11, r&d rd. ii, science-based industr ial park, hsinchu, taiwan, r. o. c. tel: 886-3-5777882 fax: 886-3-5777919 10 ? 32 pin tsop-i package outline dimension unit symbol inch(base) mm(ref) a 0.047 (max) 1.20 (max) a1 0.004 0.002 0.10 0.05 a2 0.039 0.002 1.00 0.05 b 0.008 + 0.002 - 0.001 0.20 + 0.05 -0.03 c 0.005 (typ) 0.127 (typ) d 0.724 0.004 18.40 0.10 e 0.315 0.004 8.00 0.10 e 0.020 (typ) 0.50 (typ) hd 0.787 0.008 20.00 0.20 l 0.0197 0.004 0.50 0.10 l1 0.0315 0.004 0.08 0.10 y 0.003 (max) 0.076 (max) 0 o ? 5 o 0 o ? 5 o h c c e b
utron ut62w1024 rev. 1.0 128k x 8 bit wide range low power cmos sram utron technology inc. p80056 1f, no. 11, r&d rd. ii, science-based industr ial park, hsinchu, taiwan, r. o. c. tel: 886-3-5777882 fax: 886-3-5777919 11 ? 32 pin 8mm x 13.4mm stsop package outline dimension 1 16 17 32 c l hd d "a" e e 12 (2x) 12 (2x) seating plane y 32 17 16 1 c a2 a1 l a 0.254 0 gauge plane 12 (2x) 12 (2x) seating plane "a" datail view l1 b unit symbol inch(base) mm(ref) a 0.049 (max) 1.25 (max) a1 0.005 0.002 0.130 0.05 a2 0.039 0.002 1.00 0.05 b 0.008 0.01 0.20 0.025 c 0.005 (typ) 0.127 (typ) d 0.465 0.004 11.80 0.10 e 0.315 0.004 8.00 0.10 e 0.020 (typ) 0.50 (typ) hd 0.528 0.008 13.40 0.20. l 0.0197 0.004 0.50 0.10 l1 0.0315 0.004 0.8 0.10 y 0.003 (max) 0.076 (max) 0 o ? 5 o 0 o ? 5 o c
utron ut62w1024 rev. 1.0 128k x 8 bit wide range low power cmos sram utron technology inc. p80056 1f, no. 11, r&d rd. ii, science-based industr ial park, hsinchu, taiwan, r. o. c. tel: 886-3-5777882 fax: 886-3-5777919 12 ? ordering information part no. access time (ns) standby current ( a) package ut62w1024pc-35l 35 500 32 pin pdip ut62w1024pc-35ll 35 50 32 pin pdip ut62w1024sc-35l 35 500 32 pin sop ut62w1024sc-35ll 35 50 32 pin sop UT62W1024LC-35L 35 500 32 pin tsop-i UT62W1024LC-35Ll 35 50 32 pin tsop-i ut62w1024ls-35l 35 500 32 pin stsop ut62w1024ls-35ll 35 50 32 pin stsop ut62w1024pc-55l 55 500 32 pin pdip ut62w1024pc-55ll 55 50 32 pin pdip ut62w1024sc-55l 55 500 32 pin sop ut62w1024sc-55ll 55 50 32 pin sop ut62w1024lc-55l 55 500 32 pin tsop-i ut62w1024lc-55ll 55 50 32 pin tsop-i ut62w1024ls-55l 55 500 32 pin stsop ut62w1024ls-55ll 55 50 32 pin stsop ut62w1024pc-70l 70 500 32 pin pdip ut62w1024pc-70ll 70 50 32 pin pdip ut62w1024sc-70l 70 500 32 pin sop ut62w1024sc-70ll 70 50 32 pin sop ut62w1024lc-70l 70 500 32 pin tsop-i ut62w1024lc-70ll 70 50 32 pin tsop-i ut62w1024ls-70l 70 500 32 pin stsop ut62w1024ls-70ll 70 50 32 pin stsop
utron ut62w1024 rev. 1.0 128k x 8 bit wide range low power cmos sram utron technology inc. p80056 1f, no. 11, r&d rd. ii, science-based industr ial park, hsinchu, taiwan, r. o. c. tel: 886-3-5777882 fax: 886-3-5777919 13 ? revision history revision description date rev. 0.9 original. mar.15. 2001 rev. 1.0 1. the symbols ce1# ,oe# & we# are revised as 1 ce , oe & we . 2. i cc1 is revise as i cc . 3. i cc2 is revise as i cc1 . jul. 06. 2001
utron ut62w1024 rev. 1.0 128k x 8 bit wide range low power cmos sram utron technology inc. p80056 1f, no. 11, r&d rd. ii, science-based industr ial park, hsinchu, taiwan, r. o. c. tel: 886-3-5777882 fax: 886-3-5777919 14 ? this page is left blank intentionally.

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